The UW-Madison engineers use a solution process to deposit aligned arrays of CNTs onto 1-in. square substrates. The researchers used their scalable and rapid deposition process to coat the entire surface of this substrate with aligned carbon nanotubes in less than five minutes. The team’s breakthrough could pave the way for CNT transistors to replace Sitransistors, particularly in wireless communications technologies. Photo credit: Stephanie Precourt, UW-Madison College of Engineering.The exceptional charge conduction properties of carbon nanotubes (CNTs) promise electronic devices of the future with the potential to outperform current technologies based on Si and GaAs. But to date, CNT transistors have significantly underperformed.
Now researchers at the University of Wisconsin-Madison have achieved some of the best performances ever from field-effect transistors (FETs) based on arrays of CNTs [Brady et al., Sci. Adv. 2 (2016) e1601240]. The secret of their success appears to lie in a careful fabrication process.
While ballistic electron transport approaching ‘ideal’ theoretical values has been reported in devices with single, semiconducting CNTs as the device channel, more practical devices will need to be based on arrays of nanotubes. This has made efficient devices tricky to produce, as nanotubes come in metallic as well as insulating flavors. The presence of metallic nanotubes in an array can short circuit a device and drastically reduce performance.
But Michael S. Arnold and his team have used a clever approach to ensure that their dense arrays of CNTs are at least 99.99% semiconducting. They use a polymer wrapper to isolate semiconducting nanotubes, which are then aligned on a SiO2/Si substrate using a process called floating evaporative self-assembly (FESA). The high-density array of uniformly spaced nanotubes is then treated to remove any impurities left by processing.
“When the transistors are turned on to the conductive state, the amount of current passing through each CNT in the array approaches the fundamental quantum limit,” says Arnold. “Because the CNTs conduct in parallel, and the packing density and conductance per tube are very high, the overall current density is very high.”
The devices, report the researchers, show conductance and current density seven times higher than previous CNT array FETs. The high purity of semiconducting nanotubes also enables the devices to be turned off completely, which is critical for real applications where low-power consumption in the off state is important.
The demonstration of a transistor with a dense array of pure, semiconducting CNTs is a significant step forwards, believes Mark Lundstrom of Purdue University.
“The transistor performance approaches that of the best reported single CNT transistors and is comparable to Si MOSFETs,” he says. “Although significant technological challenges remain, this work gives us hope that CNT transistors that significantly outperform conventional transistors may be possible.”
Arnold agrees, adding that their solution-based approach to CNT array devices is inherently scalable and compatible with most device processing and fabrication schemes. Ultimately, this kind of high current density CNT transistor is needed of real applications are to be realized.
“The implication for logic applications is that by replacing Si with a CNT channel it should be possible to achieve either a higher performing or lower power device operation,” he says. “The high current density and purity of the CNTs are also desirable for radio frequency amplifiers for wireless communications... [and] for thin film transistor applications such as flat panel displays that require high mobility and transparency.”
This article was originally published in Nano Today (2016), doi: 10.1016/j.nantod.2016.10.010