False color SEM image of a top-gated semiconductor nanowire transistor with a parylene gate insulator. The InAs nanowire is shown in blue, the parylene layer shown in green, and metal electrodes in yellow.A team from the University of New South Wales and Lund University have shown the first use of the organic polymer parylene as an ultra-thin, lithographically patterned gate insulator for use in nanoscale transistors. The ability to deposit such films and pattern them at the nanoscale with standard lithographic techniques could open the way for their greater use in nanoscale and nanobioelectronic applications.
Although ultra-thin parylene has been thought of as unsuitable due to pinhole issues, this study, as reported in Nano Letters [Gluschke et al. Nano Lett. (2018) DOI: 10.1021/acs.nanolett.8b01519], demonstrated that such problems can be overcome for the tiny interfacial areas in nanoscale devices. Parylene, which is biocompatible and has FDA approval for human implantable devices, has already been used as a substitute for oxides to solve similar issues in organic semiconductor devices. It is also common in medical implant encapsulation, and as an environmental protection coating for printed circuit boards and other industrial electronics, although generally in larger device structures and with much thicker films.
Here, the researchers used a custom-built parylene deposition system to put a ~20nm thick conformal coating onto a 50nm diameter InAs nanowire, which is used as the conducting channel for a field-effect transistor. The ability to make this device depends on the ability of parylene to deposit directly from the gas-phase and its high solvent resistance. They showed that parylene deposition can be performed onto chemically treated semiconductor surfaces without destroying the surface chemistry, while the solvent resistance means parylene is amenable to resist-based lithographic patterning.
“the main significance...is that there is now a very viable non-oxide organic insulator that can be used in nanoscale devices”Adam Micolich
The key features are a small deposition chamber, in situ monitoring of deposition using a quartz crystal microbalance, and the ability to isolate and evacuate the deposition chamber to rapidly terminate deposition. These enable the fabrication of devices as simple as the top-gate transistor shown in the image, and as complex as the gate-all-around transistors discussed in the paper. Importantly, the material and fabrication processes should be transferrable to other semiconductor materials, such as graphene and a range of other nanoscale device designs. As team leader Adam Micolich told Materials Today, “the main significance here is that there is now a very viable non-oxide organic insulator that can be used in nanoscale devices”.
The team’s interest in nanowire wrap-gates, which began with research we reported here in 2012, has evolved into structures with multiple wrap-gates and wrap-gating by ionic approaches, and they continue to be involved in collaborations that use ultra-thin parylene layers in other device structures and materials.