Nanowire random networks

Nanopatterning is a fundamental technology for the fabrication and integration of nanoscale devices. Unfortunately, conventional photolithography, widely used in the semiconductor industry, is facing the inherent resolution limit for sub-14 nm scale feature patterning in terms of exposure wavelength, photoresist performance, and process equipment development. Directed self-assembly (DSA) of block copolymers (BCPs) is an emerging complementary technology that may overcome such fundamental resolution limitations. BCPs are typical self-assembling polymeric materials consisting of covalently linked macromolecular blocks. Self-assembled thin films of BCPs provide periodic arrays of nanoscale spheres, cylinders, lamellae with ultrafine tunability of feature size (3–50 nm) and arbitrary large area scalability. After pattern transfer, organic BCP film can be easily disposed by a mild etching process, which is highly compatible with traditional photoresist based semiconductor processing [1], [2], [3] and [4].

To date, various DSA technologies have been exploited for the well-ordered device-oriented nanopatterns. In general, DSA approaches synergistically integrate the bottom-up process of BCP self-assembly with a top-down process of conventional photolithography, such as ArF lithography, I-line lithography or E-beam lithography. A chemical or topographical surface pattern generated by the conventional photolithography directs the orientation and positional ordering of the BCP self-assembled nanodomains for laterally ordered periodic nanopatterns. DSA principles are commonly classified into ‘epitaxial self-assembly’ and ‘graphoepitaxy’ according to the nature of the structure-directing surface pattern. ‘Epitaxial self-assembly’ employs chemical patterns to direct BCP self-assembly. A highly ordered nanopattern is anticipated when the chemical pattern commensurates with the equilibrium periodicity of BCP self-assembled nanodomains [5] and [6]. By contrast, ‘graphoepitaxy’ utilizes lithographically patterned topographical features. The selective wetting of a particular BCP component at the topographic trench side walls enforces the lateral ordering of the self-assembled BCP nanodomains along the trench wall [7]. Those two principal DSA principles have been successfully progressed for practical semiconductor processing, while diverse advantages are anticipated, including pattern density multiplication, feature size uniformity improvement, line edge roughness reduction, and enormous cost reduction.

In order to systematically investigate the fundamental requirements for the effective integration of DSA into practical semiconductor process, several DSA consortiums were recently organized worldwide, including both industry and academia [8], [9] and [10]. Considerable research effort has been devoted to the development and optimization of DSA process, relevant materials, defect analysis/reduction, etch stack integration and so on. Such collaborative efforts came to bear the successful implementation of a fab-compatible DSA process line for 300 mm size wafers. This rapid advent of practical DSA techniques is largely owing to the inherent compatibility of DSA with conventional wafer track process.

Recently, novel application fields for DSA other than traditional semiconductor devices, have been emerging. Among them, our research group recently demonstrated flexible/transferrable DSA technology utilizing chemically-modified graphene (CMG) as a nanopatterning substrate [11]. Along with the rapid advance of flexible and 3D devices, patterning technology for nonplanar/flexible geometry is becoming crucial. Nonetheless, nanopatterning technologies, including DSA, generally require spin-casting of ultrathin uniform organic layers, photolithographic radiation exposure, and a thermal/chemical annealing process step, which are inherently incompatible with flexible and nonplanar geometry. In our approach, CMG serves as a disposable and flexible substrate to transfer DSA nanostructure onto nonplanar and flexible geometries. After DSA processing is completed on CMG films in a flat geometry, the entire patterned structures are isolated from the flat geometry and transferred to any nonplanar/flexible geometry with the support of robust and flexible CMG. This approach also enables the multilayer repeatability of the DSA process at the same location, which can be exploited for the creation of complex nanopatterns, such as nanowire random network, crossbar nanowire arrays or rectangular nanopost arrays.

This month's cover image shows a high-resolution scanning electron microscope image of an Au nanowire (NW) network generated by a multilayer BCP process. The double layered Au NW network pattern was created as follows. In the first layer BCP patterning, randomly oriented Au NWs are formed on a glass substrate replicating a self-assembled lamellar morphology. After this first cycle, CMG film is spin-casted over the fabricated Au NW arrays. The second BCP patterning was performed on the CMG film. The following pattern transfer completed the double layered Au NW network pattern arrays. The interlayered CMG film may relieve the surface roughness and screen the surface energy modulation from the bottom Au NW morphology. In this work, CMG has the following advantages as a flexible and transferrable substrate: (i) atomically flat CMG surface enables uniform BCP thin films formation and robust self-assembly, (ii) thermally/chemically-stable CMG endures harsh chemical treatment and high temperature annealing required for BCP self-assembly, and (iii) mechanically-robust but flexible CMG that is easily transferrable to arbitrary flexible and non-planar substrates.

Further development of flexible/transferrable DSA will enable novel applications of DSA for various flexible electronics/optoelectronics and 3D device architectures in the near future.

This work was supported by the Research Center Program of IBS (Institute for Basic Science; IBS-R004-G1).

Further reading

1. M. Park, et al., Science, 276 (1997), p. 1401

2. C.J. Hawker, T.P. Russell, MRS Bull., 4 (2005), p. 19

3. C. Black, et al., IBM J. Res. Dev., 51 (2007), p. 605

4. S.-J. Jeong, et al., Adv. Mater., 20 (2008), p. 1898

5. L. Rockford, et al., Phys. Rev. Lett., 82 (1999), p. 2602

6. S.O. Kim, et al., Nature, 424 (2003), p. 411

7. R.A. Segalman, et al., Adv. Mater., 13 (2001), p. 1152

8. S. Tedesco, et al., IDeAL program: SOKUDO Lithography Breakfast, 11 July (2012)

9 Y. Hishiro, et al., SOKUDO Lithography Breakfast, 11 July (2012)

10. B. Rathsack, et al., Proc. SPIE, 8323 (2012) 83230B-1

11. J.Y. Kim, et al., Adv. Mater., 25 (2013), p. 1331

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DOI: 10.1016/j.mattod.2014.08.021