These scanning electron microscope images show the sequence of fabrication of fine lines by the new process. First, an array of lines is produced by a conventional electron beam process (top). The addition of a block copolymer material and a topcoat result in a quadrupling of the number of lines (center). Then the topcoat is etched away to expose the new pattern of fine lines (bottom). Images courtesy of the researchers.For the past few decades, microchip manufacturers have been on a quest to find ways to make the patterns of wires and components on their microchips ever smaller, in order to fit more of them onto a single chip and thus continue the relentless progress toward faster and more powerful computers. That progress has become more difficult recently, as manufacturing processes bump up against fundamental limits involving, for example, the wavelengths of the light used to create the patterns.
Now, a team of researchers at Massachusetts Institute of Technology (MIT), the University of Chicago and Argonne National Laboratory has managed to break through some of those limits and make it possible to produce some of the narrowest wires yet. Their novel process, which is described in a paper in Nature Nanotechnology, could easily be scaled up for mass manufacturing with standard kinds of equipment. While there are other methods that can achieve such fine lines, the team says, none of them are cost-effective for large-scale manufacturing.
The new process uses a self-assembly technique in which materials known as block copolymers are covered by a second polymer. This second polymer is deposited on the surface by first heating a precursor so it vaporizes, then allowing it to condense on a cooler surface, much as water condenses on the outside of a cold drinking glass on a hot day.
"People always want smaller and smaller patterns, but achieving that has been getting more and more expensive," says Karen Gleason, professor of chemical engineering at MIT. Today's methods for producing features smaller than about 22nm across generally require building up an image line-by-line, by scanning a beam of electrons or ions across the chip surface – a very slow process and therefore expensive to implement at large scales.
The new process comprises a novel integration of two existing methods. First, a pattern of lines is produced on the chip surface using standard lithographic techniques, in which light shines through a negative mask placed on the chip surface. Areas of the chip that are illuminated get dissolved away, leaving the spaces between them as conductive ‘wires’ that connect parts of the circuit.
Then, a layer of material known as a block copolymer – a mix of two different polymer materials that naturally segregate themselves into alternating layers or other predictable patterns – is formed by spin coating a solution of the copolymer. The block copolymers are made up of chain-like molecules, each consisting of two different polymer materials connected end-to-end.
"One half is friendly with oil, the other half is friendly with water," Kim explains. "But because they are completely bonded, they're kind of stuck with each other." The dimensions of the two chains predetermine the sizes of the layers or other patterns they will assemble themselves into when they are deposited.
Finally, a top, protective polymer layer is deposited on top of the others using a technique known as chemical vapor deposition (CVD). This top coat, it turns out, is a key to the process: it constrains the way the block copolymers self-assemble, forcing them to form into vertical layers rather than horizontal ones, like a layer cake on its side.
The underlying lithographed pattern guides the positioning of these layers, but the natural tendencies of the copolymers cause their width to be much smaller than that of the base lines. As a result, the copolymers form four lines (or more, depending on the chemistry) that fit within each base line. The lithographed layer "controls both the orientation and the alignment" of the resulting finer lines, explains Moni.
Because the top polymer layer can additionally be patterned, the system can be used to build up any kind of complex patterning, as needed for the interconnections of a microchip.
Most microchip manufacturing facilities already use the lithographic method, while the CVD process is a well-understood additional step that could be added relatively easily. Thus implementing the new method could be much more straightforward than other proposed methods for making fine lines, such as using extreme ultraviolet light, which would require the development of new light sources and new lenses to focus the light. With this new process, Gleason says, "you wouldn't need to change all those machines. And everything that's involved are well-known materials."
This story is adapted from material from MIT, with editorial changes made by Materials Today. The views expressed in this article do not necessarily represent those of Elsevier. Link to original source.