As electronic components have continued to shrink to smaller and smaller sizes, we have been rapidly approaching the nanoscale. Indeed, we have already seen the creation of simple logic circuits from semiconductor nanowires. However, despite the success of these novel architectures, the goal must be to build nanoscale equivalents of the microprocessors we are all familiar with. Researchers from Harvard and The MITRE Corporation have recently achieved this, with the development of the world’s first programmable nanoprocessor [Yan et al., Nature (2011) 470, 240].
Dr Shamik Das and co-workers used a bottom-up approach to fabricate logic tiles consisting of Ge/Si nanowires covered in layers of aluminium and zinc oxide, producing a series of non-volatile field effect transistors (FETs). The diameter of the wires was just 30 nm. Each tile consists of two arrays of nanowires, resulting in 496 FETs over an area of 960 µm2. However, previous studies have demonstrated that it could be possible to dramatically reduce this size by a factor of 103.
To construct the processor Dr Das explained to Materials Today that the Ge/Si nanowires are first fabricated using a nanocluster-catalyzed growth method, before being printed onto a substrate. “This printing innovation enables the fabrication of large arrays of aligned nanowires upon the target substrate.  Such aligned-nanowire arrays are crucial to the production of scalable nanowire nanoprocessor systems. Following the printing of nanowire arrays, lithographic techniques such as EBL [electron beam lithography] and RIE [reactive ion etching] are used to define contacts and interconnects”.
“The overall fabrication process deftly combines bottom-up techniques that define the most critical, sub-lithographic features with top-down methods [are used for]for the larger-scale structures.  As a result, the process should be scalable for the fabrication of extended, integrated systems consisting of a great number of the nanoprocessor tiles demonstrated in the present work”.
The team demonstrated that the same tile could be reprogrammed to function as a full adder, full subtractor, multiplexer and demultiplexer, as by applying a gate bias to an FET, it could be forced to act as an active transistor, or a passive connection. The tiles could also be connected together to drive subsequent elements, such that much more complex architectures could be realized.
Possible applications include integration into embedded sensors and small medical devices. According to Das, their ultimate goal is “is the demonstration of a complete, ultra-tiny nanoprocessor that can carry out energy-efficient, real-time control of such applications”.
Stewart Bland