A technology that would enable low-cost, high efficiency solar cells to be made from virtually any semiconductor material has been developed by researchers with the U.S. Department of Energy (DOE)’s Lawrence Berkeley National Laboratory (Berkeley Lab) and the University of California (UC) Berkeley. This technology opens the door to the use of plentiful, relatively inexpensive semiconductors, such as the promising metal oxides, sulfides and phosphides, that have been considered unsuitable for solar cells because it is so difficult to tailor their properties by chemical means.

Solar cells convert sunlight into electricity using semiconductor materials that exhibit the photovoltaic effect – meaning they absorb photons and release electrons that can be channeled into an electrical current. Photovoltaics are the ultimate source of clean, green and renewable energy but today’s  technologies utilize relatively scarce and expensive semiconductors, such as large crystals of silicon, or thin films of cadmium telluride or copper indium gallium selenide, that are tricky or expensive to fabricate into devices.

This new technology is called “screening-engineered field-effect photovoltaics,” or SFPV, because it utilizes the electric field effect, a well understood phenomenon by which the concentration of charge-carriers in a semiconductor is altered by the application of an electric field. With the SFPV technology, a carefully designed partially screening top electrode lets the gate electric field sufficiently penetrate the electrode and more uniformly modulate the semiconductor carrier concentration and type to induce a p-n junction. This enables the creation of high quality p-n junctions in semiconductors that are difficult if not impossible to dope by conventional chemical methods.

Under the SFPV system, the architecture of the top electrode is structured so that at least one of the electrode’s dimensions is confined. In one configuration, working with copper oxide, the Berkeley researchers shaped the electrode contact into narrow fingers; in another configuration, working with silicon, they made the top contact ultra-thin (single layer graphene) across the surface. With sufficiently narrow fingers, the gate field creates a low electrical resistance inversion layer between the fingers and a potential barrier beneath them. A uniformly thin top contact allows gate fields to penetrate and deplete/invert the underlying semiconductor. The results in both configurations are high quality p-n junctions.

This story is reprinted from material from Berkeley Lab, with editorial changes made by Materials Today. The views expressed in this article do not necessarily represent those of Elsevier. Link to original source.