MIT’s Jiadi Zhu holds an 8-inch CMOS wafer covered in a molybdenum disulfide thin film. On the right is the furnace developed by the researchers, where they were able to ‘grow’ a layer of molybdenum disulfide using a low-temperature process that did not damage the wafer. Photo courtesy of the researchers.
MIT’s Jiadi Zhu holds an 8-inch CMOS wafer covered in a molybdenum disulfide thin film. On the right is the furnace developed by the researchers, where they were able to ‘grow’ a layer of molybdenum disulfide using a low-temperature process that did not damage the wafer. Photo courtesy of the researchers.

Emerging AI applications, like chatbots that generate natural human language, demand denser, more powerful computer chips. But semiconductor chips are traditionally made with bulk materials, which are boxy 3D structures, so stacking multiple layers of transistors to create denser integrations is very difficult.

However, semiconductor transistors made from ultrathin 2D materials, each only a few atoms in thickness, could be stacked up to create more powerful chips. To this end, researchers at Massachusetts Institute of Technology (MIT) have now demonstrated a novel technology that can effectively and efficiently ‘grow’ layers of 2D transition metal dichalcogenide (TMD) materials directly on top of a fully fabricated silicon chip to allow denser integrations.

Growing 2D materials directly onto a silicon CMOS (complementary metal–oxide–semiconductor) wafer has posed a major challenge because the growth process usually requires temperatures of about 600°C, whereas silicon transistors and circuits can break down when heated above 400°C. Now, the interdisciplinary team of MIT researchers has developed a low-temperature growth process that does not damage the chip. This technology allows 2D semiconductor transistors to be directly integrated on top of standard silicon circuits.

In the past, researchers have had to grow 2D materials elsewhere and then transfer them onto a chip or a wafer. This often causes imperfections that can hamper the performance of the final devices and circuits. Also, transferring the material smoothly becomes extremely difficult at wafer-scale. By contrast, this new process can grow a smooth, highly uniform layer across an entire 8-inch wafer.

The new technology is also able to significantly reduce the time it takes to grow these materials. While previous approaches required more than a day to grow a single layer of 2D materials, the new approach can grow a uniform layer of TMD material in less than an hour over entire 8-inch wafers.

Due to its rapid speed and high uniformity, the new technology allowed the researchers to successfully integrate a 2D material layer onto much larger surfaces than had previously been demonstrated. This makes their method better-suited for use in commercial applications, where wafers that are 8 inches or larger are key.

“Using 2D materials is a powerful way to increase the density of an integrated circuit,” says Jiadi Zhu, an electrical engineering and computer science graduate student at MIT and co-lead author of a paper on this new technique in Nature Nanotechnology. “What we are doing is like constructing a multistory building. If you have only one floor, which is the conventional case, it won’t hold many people. But with more floors, the building will hold more people that can enable amazing new things. Thanks to the heterogenous integration we are working on, we have silicon as the first floor and then we can have many floors of 2D materials directly integrated on top.”

The 2D material the researchers focused on, molybdenum disulfide, is flexible, transparent, and exhibits powerful electronic and photonic properties that make it ideal for a semiconductor transistor. It is composed of a layer of molybdenum atoms sandwiched between two layers of sulfur atoms.

Growing thin films of molybdenum disulfide on a surface with good uniformity is often accomplished through a process known as metal-organic chemical vapor deposition (MOCVD). Molybdenum hexacarbonyl and diethylene sulfur, two organic chemical compounds that contain molybdenum and sulfur atoms, are vaporized and then heated inside a reaction chamber, where they ‘decompose’ into smaller molecules. These smaller molecules link up through chemical reactions to form chains of molybdenum disulfide on a surface.

But decomposing these molybdenum and sulfur compounds, which are known as precursors, requires temperatures above 550°C, while silicon circuits start to degrade when temperatures surpass 400°C.

So, the researchers started by thinking outside the box – they designed and built an entirely new furnace for the MOCVD process.

This furnace consists of two chambers: a low-temperature region in the front, where the silicon wafer is placed; and a high-temperature region in the back. Vaporized molybdenum and sulfur precursors are pumped into the furnace. The molybdenum stays in the low-temperature region, where the temperature is kept below 400°C – hot enough to decompose the molybdenum precursor but not so hot that it damages the silicon chip.

The sulfur precursor flows through into the high-temperature region, where it decomposes. Then it flows back into the low-temperature region, where the chemical reaction to grow molybdenum disulfide on the surface of the wafer occurs.

“You can think about decomposition like making black pepper – you have a whole peppercorn and you grind it into a powder form,” Zhu explains. “So, we smash and grind the pepper in the high-temperature region, then the powder flows back into the low-temperature region.”

One problem with this process is that silicon circuits typically have aluminum or copper as a top layer so the chip can be connected to a package or carrier before it is mounted onto a printed circuit board. But sulfur causes these metals to sulfurize, in the same way that exposing some metals to oxygen causes them to rust, which destroys their conductivity. The researchers prevented sulfurization by first depositing a very thin layer of a passivation material on top of the chip. Later, they could open the passivation layer to make connections.

They also placed the silicon wafer into the low-temperature region of the furnace vertically rather than horizontally. Placing it vertically ensures neither end is too close to the high-temperature region, so no part of the wafer is damaged by the heat. Plus, the molybdenum and sulfur gas molecules swirl around as they bump into the vertical chip, rather than flowing over a horizontal surface. This circulation effect improves the growth of molybdenum disulfide on the wafer and leads to better material uniformity.

In addition to yielding a more uniform layer, their method was also much faster than other MOCVD processes, allowing them to grow a layer in less than an hour, while typically the MOCVD growth process takes at least an entire day. Using the state-of-the-art MIT.Nano facilities, the researchers were able to demonstrate high material uniformity and quality across an 8-inch silicon wafer, which is especially important for industrial applications where bigger wafers are needed.

“By shortening the growth time, the process is much more efficient and could be more easily integrated into industrial fabrications,” Zhu says. “Plus, this is a silicon-compatible low-temperature process, which can be useful to push 2D materials further into the semiconductor industry.”

In the future, the researchers want to fine-tune their technique and use it to grow many stacked layers of 2D transistors. In addition, they want to explore the use of the low-temperature growth process for flexible surfaces like polymers, textiles or even paper. This could permit the integration of semiconductors onto everyday objects like clothing or notebooks.

This story is adapted from material from MIT, with editorial changes made by Materials Today. The views expressed in this article do not necessarily represent those of Elsevier. Link to original source.