The experimental transistor uses silicon oxide for the base, carbide for the 2D material and aluminum oxide for the encapsulating material. Image: Zahra Hemmat.
The experimental transistor uses silicon oxide for the base, carbide for the 2D material and aluminum oxide for the encapsulating material. Image: Zahra Hemmat.

Sandwiching two-dimensional (2D) materials between three-dimensional (3D) silicon bases and an ultrathin layer of aluminum oxide can significantly reduce the risk of component failure due to overheating in nanoelectronic devices. This is according to a new study led by researchers at the University of Illinois at Chicago (UIC) College of Engineering, who report their findings in a paper in Advanced Materials.

Many of today's silicon-based electronic components contain 2D materials such as graphene. Incorporating 2D materials like graphene, which is composed of a single-atom-thick layer of carbon atoms, into these components allows them to be several orders of magnitude smaller than if they were made with conventional 3D materials. In addition, 2D materials also offer other unique functionalities. But nanoelectronic components with 2D materials have an Achilles' heel – they are prone to overheating, due to poor heat conductance from the 2D materials to the silicon base.

"In the field of nanoelectronics, the poor heat dissipation of 2D materials has been a bottleneck to fully realizing their potential in enabling the manufacture of ever-smaller electronics while maintaining functionality," said Amin Salehi-Khojin, associate professor of mechanical and industrial engineering in UIC's College of Engineering.

One of the reasons 2D materials can't efficiently transfer heat to silicon is because the interactions between the 2D materials and the silicon in components like transistors are rather weak. "Bonds between the 2D materials and the silicon substrate are not very strong, so when heat builds up in the 2D material, it creates hot spots causing overheat and device failure," explained Zahra Hemmat, a graduate student in the UIC College of Engineering and co-first author of the paper.

In order to enhance the connection between the 2D material and the silicon base to improve heat conductance away from the 2D material into the silicon, Salehi-Khojin and his colleagues have experimented with adding an additional ultra-thin layer of material on top of the 2D layer. In effect, they are creating a ‘nano-sandwich’ with the silicon base and ultrathin material as the ‘bread’.

"By adding another 'encapsulating' layer on top of the 2D material, we have been able to double the energy transfer between the 2D material and the silicon base," said Salehi-Khojin.

The researchers created an experimental transistor using silicon oxide for the base, carbide for the 2D material and aluminum oxide for the encapsulating material. At room temperature, they found that the conductance of heat from the carbide to the silicon base was twice as high with the aluminum oxide layer as without it.

"While our transistor is an experimental model, it proves that by adding an additional, encapsulating layer to these 2D nanoelectronics, we can significantly increase heat transfer to the silicon base, which will go a long way towards preserving functionality of these components by reducing the likelihood that they burn out," said Salehi-Khojin. "Our next steps will include testing out different encapsulating layers to see if we can further improve heat transfer."

This story is adapted from material from the University of Illinois at Chicago, with editorial changes made by Materials Today. The views expressed in this article do not necessarily represent those of Elsevier. Link to original source.